The present invention relates to telecommunications exchange switching networks and is more particularly concerned with arrangements for detecting errors in digital switching networks.
It is well established in the prior art to provide duplicated switch block security planes and to operate these networks in one of a number of different modes to permit reconfiguration on a per channel basis in the event of faults occurring on more than one switch block security plane at a time. U.K. Patent Specification No. 1,582,456 shows one such arrangement in which corresponding inlets and outlets on the duplicated switch block security planes are terminated respectively on receive and transmit interfaces of digital line termination units and the receive digital line termination unit interface (RXDLT) is arranged to transmit to both planes for each speech or data sample the sample accompanied by an error indicating code and each transmit digital line termination unit interface (TXDLT) is arranged to compare the sample received from the duplicated switch blocks and if they differ, the error detecting codes accompanying each samples are used to decide which sample should be used for transmission over the outgoing exchange junctions path. Alternative arrangements have been disclosed in U.K. Patent Specification Nos. 1,447,713 and 1,439,568.
The methods of error detection disclosed in the above Patent Specifications involve either the addition of a check code or a plane select bit to the information sample to be transmitted. The addition of extra information requires extra routes additional to the information sample path through the switch blocks. Such an arrangement is readily provided in switch blocks using parallel transmission where the addition of a parity bit for example simply requires n+1 paths, however, in switch blocks using serial transmission the repetition rate of the samples has to be retimed to incorporate the check code or alternatively extra routes dedicated only to the handling of the check code are required.
An alternative arrangement is to transmit the speech sample alone through both of the switch block planes and to compare the received samples. However this requires further analysis by the network control system to "pin down" the fault by, for example, performing a path check on both of the switch block paths used. This of course delays the time to reconfigure around the fault degrading the quality of service of the exchange and requires the use of hardware access connections and associated software/firmware arrangements.
It is a principle aim of the present invention to provide an information sample error detection arrangement for use in a digital switching telecommunications exchange including duplicated switch blocks which overcomes the above identified difficulties.